But I think it should go back into SIO2MAN if we want it to play nice with other SIO2 transfers.
Yes and no. If, in theory we could go in SIO2MAN, that would make things a lot simpler. But for programs like OPL, where the SIO2MAN IRX comes from the game, this is not possible without patching.
I still haven't tested the code I proposed for more compatible interrupting of ongoing transfers of other SIO2 devices. If that works, then we won't have to worry about this. If that doesn't work, then the only way to make things not interfere with each-other will be SIO2MAN integration / patching, and I really hope we don't have to resort to that.
SIO2D is a sony driver that is supposed to detect insertion/removal of devices, but we don't have an open-source ps2sdk version of it. Perhaps we'll need this in the future.
I have done many tests on the SIO2 interface and I don't think there is an feature to detect insertion/removal, other than simply transferring data, etc. (There is also the ACK line that has to be driven active at the end of each transferred byte AFAIR, else the transfer will fail, which is why we have it constantly connected in that state.)
One thing slowing the transfer down seems to be bit-inversion for all transmissions.
@wisi do you know why this is needed?
This cannot be avoided. The bits in each byte are in reverse order, so they need to be reversed, or it won't work on a PC (or anything else) then.
Perhaps we can double-buffer the transfers, and invert 1 block while the other is being transferred.
This is mostly what the driver is currently doing. This is why it is using PIO and not DMA. DMA requires having all bytes with bits order already reversed, so it actually makes the transfers really slow.
The current driver reverses the bits order of the bytes in one word, then sends it, and while it is being sent, it reverses the next word. Also the fact that it is done in word pieces, makes it faster per-byte.
And even if this is done, the SIO2 is *still* too slow! So there is time left, which is why I added the fast asm CRC code, which only slows-down things a little bit.
In fact I am so certain that this is the maximum possible speed of this interface that I am very keen on seeing anybody achieving a higher speed, if possible.
I don't know what we will see on a PPC-IOP. I really hope it is not lower speeds.
Are the above tests with CRC enabled or disabled?
@wisi did you make this yourself or is it a copy from somewhere?
I copied it from that same website you found, back in our first discussion about this on psx-scene.com. But I don't remember the website.
I am quite certain that the code doing the transfers is mostly OK.
The part I am having doubts about is the initialization. There may be more steps needed there and some changes as well. This may improve compatibility with some cards.
The problem is that we have no way of giving the card clocks without having the /CS line active low. An MCU can help with this. I think this may be one of the reasons for the incompatibility.
But yes, maybe we can use that new code, as long as it doesn't makes the driver too big, as in the case of OPL, this is a requirement too.
There are some workarounds I had to do, to make SIO2 compatible with the SD SPI interface transfer specs - mainly related to the inability to easily transfer single bytes.