Recent content by zecoxao

  1. zecoxao

    PS3 The (Microcode?) ROM: bits shared and an overview

    props to user sagemono for the discovery.
  2. zecoxao

    PS3 The (Microcode?) ROM: bits shared and an overview

    it has been discovered that the microcode rom uses as architecture IBM Risc System 6000. some evidence: https://github.com/gcc-mirror/gcc/blob/09e74059bdb12c784570d40b28a33f22090badfe/gcc/config/rs6000/cell.md https://gcc.gnu.org/pipermail/gcc-patches/2008-September/248999.html...
  3. zecoxao

    A gift for the community

    a talk: https://reverse-2026.sessionize.com/session/1077896
  4. zecoxao

    A gift for the community

    uploaded the (now) bit corrected roms, courtesy of Anonymous
  5. zecoxao

    A gift for the community

    more like glitch the device to get the master keys and fuses
  6. zecoxao

    A gift for the community

    The xbox one bootrom, the first piece of code that runs on xbox one that bootstraps everything else
  7. zecoxao

    A gift for the community

    With love from Anonymous
  8. zecoxao

    PS3 Please HELP - Firmware flash on a DECH S4000AB Debug Console

    i'm kinda curious as to why noone dumped the coreos on these units, as it provides valuable information for AV firmwares (having only two pups of this and nothing else kinda sucks)
  9. zecoxao

    PS3 The (Microcode?) ROM: bits shared and an overview

    here are the three files. good luck with the decoding process. we have tried and have so far failed
  10. zecoxao

    PS3 The (Microcode?) ROM: bits shared and an overview

    So, as you might all be aware, the lv0ldr and metldr contain perconsole crypto that is handled either by a rom and fuses or by RTL that would make it impossible to retrieve without expending quite a lot of cash on chip analysis (which is money that i didn't have back when i started this project)...
  11. zecoxao

    PS3 CECH-B Wifiless to Wifi: Requirements

    Good point, yes, you need to be on 3.55
  12. zecoxao

    PS3 CECH-B Wifiless to Wifi: Requirements

    1. 8th Byte Of idps changed from 02 to 01 (Using IDPSet or Evilnat's CECH-A leaf) 2. Syscon UART EEPROM at 3298 Change 00 03 to FF FF 3. Components Changed (See Below) 4. FSM Blind Update (THIS NEEDS Lv2diag.self!) (THIS NEEDS 3.55 Rogero 3.7 NO BD) 5. More Missing Parts (SOON tm) Option Now...
  13. zecoxao

    PS3 BadWDSD HW Exploit - With new powerful qCFW for PS3 Slim & SuperSlim NOR models on the horizon

    documented a couple more things, thanks to @esc0rtd3w
  14. zecoxao

    PS3 BadWDSD HW Exploit - With new powerful qCFW for PS3 Slim & SuperSlim NOR models on the horizon

    All except DEBUG UART are dip switches. DEBUG UART is to give you logs, so you just use a normal uart chip, something like CP2102, to communicate with it and tell you what's happening. TX to RX and RX to TX in the CP2102 case (you can see in photo)
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