PS3 Fault finding YLOD with the SYSCON - First steps and Error reporting

I'm sorry, we tried, I say I can't do much more as didn't discover myself at right time.
I don't see were else could be.
8130706e20a2c10d945bd6d365a4f8dc.jpg
732d0dde81c1bfaa1c86b5a25fdd886d.jpg
 
I'm sorry, we tried, I say I can't do much more as didn't discover myself at right time.
I don't see were else could be.
8130706e20a2c10d945bd6d365a4f8dc.jpg
732d0dde81c1bfaa1c86b5a25fdd886d.jpg
Thank you for your help, so I solder wires from 3.3V to MB RX and from 0.75V to MB TX(or opposite) and leave my wires connected to mb points as before, plug power and then do I write something to the syscon or open putty first? A bit confused about that part, sorry. Also did I mess something up by sending
Code:
EEP SET 3961 01 00

to the console? thanks for your help.
KbrdjhT.png
lgbUKGR.png
 
Thank you for your help, so I solder wires from 3.3V to MB RX and from 0.75V to MB TX(or opposite) and leave my wires connected to mb points as before, plug power and then do I write something to the syscon or open putty first? A bit confused about that part, sorry. Also did I mess something up by sending
Code:
EEP SET 3961 01 00

Look at this table as reference (and click in the arrow at top for "sherwood" to reorder the table rows)
https://www.psdevwiki.com/ps3/Talk:SC_EEPROM#Experimental_table

It seems offset 0x3961 is out of the "rewritable" areas... so probably you didnt wrote anything
For a confirmation try to do the inverse process, you tryed to write byte 00 at offset 0x3961... so try to read it and see if is different than 00
Code:
EEP GET 3961 01
If the result is different than 00 it means you didnt wrote anything, most probably is not going to show anything because as i said you are trying to read/write in protected areas where there is no read/write access
 
Look at this table as reference (and click in the arrow at top for "sherwood" to reorder the table rows)
https://www.psdevwiki.com/ps3/Talk:SC_EEPROM#Experimental_table

It seems offset 0x3961 is out of the "rewritable" areas... so probably you didnt wrote anything
For a confirmation try to do the inverse process, you tryed to write byte 00 at offset 0x3961... so try to read it and see if is different than 00
Code:
EEP GET 3961 01
If the result is different than 00 it means you didnt wrote anything, most probably is not going to show anything because as i said you are trying to read/write in protected areas where there is no read/write access
I actually tried that and got back FFFFA501
 
In SW models you aren't able to read anything over 1400h. 13ff limited on uart.
So don't worry I will share those SB pins with time whenever I get same board here.
You have a glod issue, if you consider rsx is good by checking all measurements try reball same , or exchange.
 
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In SW models you aren't able to read anything over 1400h. 13ff limited on uart.
So don't worry I will share those SB pins with time whenever I get same board here.
You have a glod issue, if you consider rsx is good by checking all measurements try reball same , or exchange.
Sir if you see the pictures i shared above in post from your pictures i measured 0.75V and 3.3V points. I just want some guidance specifics on what to do with these pins, (solder them to normal rx tx pins and then write command "w 1202 02" and then open putty? thank you for your help.
KbrdjhT.png
lgbUKGR.png
 
We connect on normal uart on syscon SW ic and we write that address 1202 02. After if we know what second uart port is for SB(southbridge ic) we connect to that uart port (rxtx). At this point I'm afraid I can't help anymore for this board as I am not confident to test myself.
It suppose to show automatically log when we open putty software with uart adaptor soldered to second uart port for SB.
Read and watch over this thread examples I've posted back.
Uart port for SB is always accessible only when unit it can stay open as glod mode.
 
We connect on normal uart on syscon SW ic and we write that address 1202 02. After if we know what second uart port is for SB(southbridge ic) we connect to that uart port (rxtx). At this point I'm afraid I can't help anymore for this board as I am not confident to test myself.
It suppose to show automatically log when we open putty software with uart adaptor soldered to second uart port for SB.
Read and watch over this thread examples I've posted back.
Uart port for SB is always accessible only when unit it can stay open as glod mode.
Hello, what do you mean you're not confident to test yourself? I soldered to the top 3v3 point and 0.75 to the right of the two pads, swapped rx and tx a couple of times to no avail,if you had a board how would you go about finding the sb rx tx? I'm dedicated to finding them unless it's a putty fault, I use default settings speed 9600 nothing shows up on putty :/. I have written 1202 02.
Ewdoibg.png
 
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Try set putty 115200. Try find Tx on board while it's booting with multimeter, that voltage 3v3 should kind fluctuating in first 10~15 seconds of boot sequence.
Basically only that pin with gnd is used as we won't be able to send nothing on this port, we just receive data.
 
hello, i have 2 cok 002 boards. Both attempted to repair by the previous owner and the one im trying to save has a swell on the board. It was missing a lot of smd components. I replaced them from donor board. Once i finished all visible works it gave me these errors:
ERR 00: 00000000 A0203010 FFFFFFFF
ERR 01: 00000000 A0202120 FFFFFFFF
the one with hdmi related error is not too necessary i think i can solve it but i cant solve this 3010 (BE_INIT OR BE_POWGOOD OR CLOCK ERRORS) error. I checked smd components on near the cpu and didnt find anything obvious. Tried to trace the cpu feeding rail but i failed :D Should i gave up on these? Seller said he heated both mobos with heat gun so he could be completely burned the cpu maybe or damaged the layers of the board? because it has terrible swelling on middle of the board. I changed %50 of nec tokins by the way in case if its that.

odlOtv
odlXVx
 
Hello, what do you mean you're not confident to test yourself? I soldered to the top 3v3 point and 0.75 to the right of the two pads, swapped rx and tx a couple of times to no avail,if you had a board how would you go about finding the sb rx tx? I'm dedicated to finding them unless it's a putty fault, I use default settings speed 9600 nothing shows up on putty :/. I have written 1202 02.
Ewdoibg.png
So IDK where u got the idea to solder to that 3.3v pad, but all you need to do is connect 2x wires to the outter most pads on the pci port. Like in the example image I posted before. Did that not work or something?

Victor's just saying you first have to enable the SB UART bit in SYSCON UART before switching over to the SB UART. And that the SB log wont start until the bootloader does. So the console needs to be able to get at least that far into the booting process or it wont start logging anything.

Please post a picture of how you hooked the wires up.
 
So IDK where u got the idea to solder to that 3.3v pad, but all you need to do is connect 2x wires to the outter most pads on the pci port. Like in the example image I posted before. Did that not work or something?

Victor's just saying you first have to enable the SB UART bit in SYSCON UART before switching over to the SB UART. And that the SB log wont start until the bootloader does. So the console needs to be able to get at least that far into the booting process or it wont start logging anything.

Please post a picture of how you hooked the wires up.
Yes the system gets that far and I have sent the write command and confirmed with read, this is the hookup(while testing I only had right wire soldered to pad so no chance of shorting) and sadly pulled the pad because jumper wire a bit too big and heavy and wasn't as careful when trying to pass it through the shield.
NJLuZlK.jpg
L6FTGiz.jpg
RzwhwFR.jpg
uqhYSbV.jpg
 
If this won't work for anyone, you may leave it aside until I test myself. It takes time. Not much to ps3 around my workshop this time of year.
 
I'm sorry, we tried, I say I can't do much more as didn't discover myself at right time.
I don't see were else could be.
8130706e20a2c10d945bd6d365a4f8dc.jpg
732d0dde81c1bfaa1c86b5a25fdd886d.jpg
Wait, do you mean I should bridge them? What is that equal symbol there? Thank you.
EDIT:Nevermind, here you go sir. It was the 2 round points you had circled here. Pay NO attention to the fataldown start error, I had not plugged psu cable all the way in.
8130706e20a2c10d945bd6d365a4f8dc.jpg
dafMVAf.png
PZiM99b.jpg
1wfU6go.jpg

Boot Loader SE Version 4.8.6 (Build ID: 5353,50715, Build Date: 2020-01-30_ 11:23:58)
SDK Version: 486.000
Copyright(C) 2020 Sony Computer Entertainment Inc.All Rights Reserved.
[INFO]: === eXtreme Data Rate Memory Subsystem ===
[INFO]: (Configured Memory Size per single XIO channel: 128 MBytes.)
[INFO]: XIO channel[0] is available.
[INFO]: XIO channel[1] is available.
[INFO]: ---> Total 256 MBytes are now in use.
[INFO]: SPU enable [0, 1, 2, 5, 6, 7] 11101111
[INFO]: BE:11S DD1.0, SB:SX1.2
Cell OS SDK4.8.6 000 (release build: r50715 2020_01_30_110000)
Copyright 2020 Sony Computer Entertainment Inc.
revision: 50702
date: Thu Jan 30 11:25:44 JST 2020
skip 2nd initialization step
lv2(0): total memory size: 249MB+640KB
lv2(0): kern memory size: 12MB+640KB (heap:3492KB page pool:4736KB)
lv2(0): user memory size: 237MB
lv2(2):
lv2(2): Cell OS Lv-2 32 bit version 4.8.6
lv2(2): Copyright 2011 Sony Computer Entertainment Inc.
lv2(2): All Rights Reserved.
lv2(2):
lv2(2): revision: 50715
lv2(2): build date: 2020/01/30 11:30:24
lv2(2): processor: Broadband Engine Ver 0x0000 Rev 0x1000
lv2(2): PPU:0, Thread:0 is enabled.
lv2(2): PPU:0, Thread:1 is enabled.
lv2(2): rsx: rsx65 a06 500/650 vpe:ff shd:6f [AP0011327:1:1:a:b:13:2:5:1][ 3d:0:2:0:1:2:0][2:1:0]

lv2(2): Available physical SPUs: 6/7
lv2(2): mounting the flash file system : ........... Failed (error code:0x800100 2b)
lv2(2):
lv2(2): ###
lv2(2): ### Safe mode
lv2(2): ###
lv2(2):
lv2(2): creating the recover process (for safe mode) : OK
lv2(2): sys_storage_get_device_info() failed. 0x80010002.
lv2(2): RescueUtilityGetStorageCapacity() failed. 0x1.
lv2(2): this system has no available hard disk.
lv2(2): please attach hard disk drive.
Boot Loader SE Version 4.8.6 (Build ID: 5353,50715, Build Date: 2020 -01-30_11:23:58)
SDK Version: 486.000
Copyright(C) 2020 Sony Computer Entertainment Inc.All Rights Reserved.
[INFO]: === eXtreme Data Rate Memory Subsystem ===
[INFO]: (Configured Memory Size per single XIO channel: 128 MBytes.)
[INFO]: XIO channel[0] is available.
[INFO]: XIO channel[1] is available.
[INFO]: ---> Total 256 MBytes are now in use.
[INFO]: SPU enable [0, 1, 2, 5, 6, 7] 11101111
[INFO]: BE:11S DD1.0, SB:SX1.2
Cell OS SDK4.8.6 000 (release build: r50715 2020_01_30_110000)
Copyright 2020 Sony Computer Entertainment Inc.
revision: 50702
date: Thu Jan 30 11:25:44 JST 2020
skip 2nd initialization step
lv2(0): total memory size: 249MB+640KB
lv2(0): kern memory size: 12MB+640KB (heap:3492KB page pool:4736KB)
lv2(0): user memory size: 237MB
lv2(2):
lv2(2): Cell OS Lv-2 32 bit version 4.8.6
lv2(2): Copyright 2011 Sony Computer Entertainment Inc.
lv2(2): All Rights Reserved.
lv2(2):
lv2(2): revision: 50715
lv2(2): build date: 2020/01/30 11:30:24
lv2(2): processor: Broadband Engine Ver 0x0000 Rev 0x1000
lv2(2): PPU:0, Thread:0 is enabled.
lv2(2): PPU:0, Thread:1 is enabled.
lv2(2): rsx: rsx65 a06 500/650 vpe:ff shd:6f [AP0011327:1:1:a:b:13:2:5:1][ 3d:0:2:0:1:2:0][2:1:0]

lv2(2): Available physical SPUs: 6/7
lv2(2): mounting the flash file system : ........... Failed (error code:0x800100 2b)
lv2(2):
lv2(2): ###
lv2(2): ### Safe mode
lv2(2): ###
lv2(2):
lv2(2): creating the recover process (for safe mode) : OK
 
Last edited:
Right got two ps3 today that are ylod one has got 4 second till ylod and other 14 seconds i did find something about the times of it but lost it i also tried connecting another ps3 with 2 second ylod to the ttl usb but had bad luck and it ripped the rx trace so am pi**ed aha so gonna use that for the casing just dont wanna use my ttl adapter as ive prob got bad luck with it for now as my slim died 2 days ago and that was my main system for online
 
Wait, do you mean I should bridge them? What is that equal symbol there? Thank you.
EDIT:Nevermind, here you go sir. It was the 2 round points you had circled here. Pay NO attention to the fataldown start error, I had not plugged psu cable all the way in.
8130706e20a2c10d945bd6d365a4f8dc.jpg
dafMVAf.png
PZiM99b.jpg
1wfU6go.jpg

Boot Loader SE Version 4.8.6 (Build ID: 5353,50715, Build Date: 2020-01-30_ 11:23:58)
SDK Version: 486.000
Copyright(C) 2020 Sony Computer Entertainment Inc.All Rights Reserved.
[INFO]: === eXtreme Data Rate Memory Subsystem ===
[INFO]: (Configured Memory Size per single XIO channel: 128 MBytes.)
[INFO]: XIO channel[0] is available.
[INFO]: XIO channel[1] is available.
[INFO]: ---> Total 256 MBytes are now in use.
[INFO]: SPU enable [0, 1, 2, 5, 6, 7] 11101111
[INFO]: BE:11S DD1.0, SB:SX1.2
Cell OS SDK4.8.6 000 (release build: r50715 2020_01_30_110000)
Copyright 2020 Sony Computer Entertainment Inc.
revision: 50702
date: Thu Jan 30 11:25:44 JST 2020
skip 2nd initialization step
lv2(0): total memory size: 249MB+640KB
lv2(0): kern memory size: 12MB+640KB (heap:3492KB page pool:4736KB)
lv2(0): user memory size: 237MB
lv2(2):
lv2(2): Cell OS Lv-2 32 bit version 4.8.6
lv2(2): Copyright 2011 Sony Computer Entertainment Inc.
lv2(2): All Rights Reserved.
lv2(2):
lv2(2): revision: 50715
lv2(2): build date: 2020/01/30 11:30:24
lv2(2): processor: Broadband Engine Ver 0x0000 Rev 0x1000
lv2(2): PPU:0, Thread:0 is enabled.
lv2(2): PPU:0, Thread:1 is enabled.
lv2(2): rsx: rsx65 a06 500/650 vpe:ff shd:6f [AP0011327:1:1:a:b:13:2:5:1][ 3d:0:2:0:1:2:0][2:1:0]

lv2(2): Available physical SPUs: 6/7
lv2(2): mounting the flash file system : ........... Failed (error code:0x800100 2b)
lv2(2):
lv2(2): ###
lv2(2): ### Safe mode
lv2(2): ###
lv2(2):
lv2(2): creating the recover process (for safe mode) : OK
lv2(2): sys_storage_get_device_info() failed. 0x80010002.
lv2(2): RescueUtilityGetStorageCapacity() failed. 0x1.
lv2(2): this system has no available hard disk.
lv2(2): please attach hard disk drive.
Boot Loader SE Version 4.8.6 (Build ID: 5353,50715, Build Date: 2020 -01-30_11:23:58)
SDK Version: 486.000
Copyright(C) 2020 Sony Computer Entertainment Inc.All Rights Reserved.
[INFO]: === eXtreme Data Rate Memory Subsystem ===
[INFO]: (Configured Memory Size per single XIO channel: 128 MBytes.)
[INFO]: XIO channel[0] is available.
[INFO]: XIO channel[1] is available.
[INFO]: ---> Total 256 MBytes are now in use.
[INFO]: SPU enable [0, 1, 2, 5, 6, 7] 11101111
[INFO]: BE:11S DD1.0, SB:SX1.2
Cell OS SDK4.8.6 000 (release build: r50715 2020_01_30_110000)
Copyright 2020 Sony Computer Entertainment Inc.
revision: 50702
date: Thu Jan 30 11:25:44 JST 2020
skip 2nd initialization step
lv2(0): total memory size: 249MB+640KB
lv2(0): kern memory size: 12MB+640KB (heap:3492KB page pool:4736KB)
lv2(0): user memory size: 237MB
lv2(2):
lv2(2): Cell OS Lv-2 32 bit version 4.8.6
lv2(2): Copyright 2011 Sony Computer Entertainment Inc.
lv2(2): All Rights Reserved.
lv2(2):
lv2(2): revision: 50715
lv2(2): build date: 2020/01/30 11:30:24
lv2(2): processor: Broadband Engine Ver 0x0000 Rev 0x1000
lv2(2): PPU:0, Thread:0 is enabled.
lv2(2): PPU:0, Thread:1 is enabled.
lv2(2): rsx: rsx65 a06 500/650 vpe:ff shd:6f [AP0011327:1:1:a:b:13:2:5:1][ 3d:0:2:0:1:2:0][2:1:0]

lv2(2): Available physical SPUs: 6/7
lv2(2): mounting the flash file system : ........... Failed (error code:0x800100 2b)
lv2(2):
lv2(2): ###
lv2(2): ### Safe mode
lv2(2): ###
lv2(2):
lv2(2): creating the recover process (for safe mode) : OK
Ok so at this stage you got it right this I'm often calling myself "special glod". If reball or exchange of this rsx not going to change its working status I suggest recap totally 12x470uF caps on both, use vdd for core minimum total wire 3mm diameter.
In case is a board issue and rsx good, it should remain in this stage of glod.
I've pointed those small bridges (=) as those will be used in case you want to pass those together to a side unsoldered port like having all grouped in one port.
Usually for me only exchange rsx was working.
I also think I killed some 40nm while deliding ihs. Well on 65nm delid should be easy but not necessarily reball process won't kill in some way ic from heat.
So I know on all my test all boards should stay in same condition, not worst.
 
Last edited:
Wait, do you mean I should bridge them? What is that equal symbol there? Thank you.
EDIT:Nevermind, here you go sir. It was the 2 round points you had circled here. Pay NO attention to the fataldown start error, I had not plugged psu cable all the way in.
8130706e20a2c10d945bd6d365a4f8dc.jpg
dafMVAf.png
PZiM99b.jpg
1wfU6go.jpg

Boot Loader SE Version 4.8.6 (Build ID: 5353,50715, Build Date: 2020-01-30_ 11:23:58)
SDK Version: 486.000
Copyright(C) 2020 Sony Computer Entertainment Inc.All Rights Reserved.
[INFO]: === eXtreme Data Rate Memory Subsystem ===
[INFO]: (Configured Memory Size per single XIO channel: 128 MBytes.)
[INFO]: XIO channel[0] is available.
[INFO]: XIO channel[1] is available.
[INFO]: ---> Total 256 MBytes are now in use.
[INFO]: SPU enable [0, 1, 2, 5, 6, 7] 11101111
[INFO]: BE:11S DD1.0, SB:SX1.2
Cell OS SDK4.8.6 000 (release build: r50715 2020_01_30_110000)
Copyright 2020 Sony Computer Entertainment Inc.
revision: 50702
date: Thu Jan 30 11:25:44 JST 2020
skip 2nd initialization step
lv2(0): total memory size: 249MB+640KB
lv2(0): kern memory size: 12MB+640KB (heap:3492KB page pool:4736KB)
lv2(0): user memory size: 237MB
lv2(2):
lv2(2): Cell OS Lv-2 32 bit version 4.8.6
lv2(2): Copyright 2011 Sony Computer Entertainment Inc.
lv2(2): All Rights Reserved.
lv2(2):
lv2(2): revision: 50715
lv2(2): build date: 2020/01/30 11:30:24
lv2(2): processor: Broadband Engine Ver 0x0000 Rev 0x1000
lv2(2): PPU:0, Thread:0 is enabled.
lv2(2): PPU:0, Thread:1 is enabled.
lv2(2): rsx: rsx65 a06 500/650 vpe:ff shd:6f [AP0011327:1:1:a:b:13:2:5:1][ 3d:0:2:0:1:2:0][2:1:0]

lv2(2): Available physical SPUs: 6/7
lv2(2): mounting the flash file system : ........... Failed (error code:0x800100 2b)
lv2(2):
lv2(2): ###
lv2(2): ### Safe mode
lv2(2): ###
lv2(2):
lv2(2): creating the recover process (for safe mode) : OK
lv2(2): sys_storage_get_device_info() failed. 0x80010002.
lv2(2): RescueUtilityGetStorageCapacity() failed. 0x1.
lv2(2): this system has no available hard disk.
lv2(2): please attach hard disk drive.
Boot Loader SE Version 4.8.6 (Build ID: 5353,50715, Build Date: 2020 -01-30_11:23:58)
SDK Version: 486.000
Copyright(C) 2020 Sony Computer Entertainment Inc.All Rights Reserved.
[INFO]: === eXtreme Data Rate Memory Subsystem ===
[INFO]: (Configured Memory Size per single XIO channel: 128 MBytes.)
[INFO]: XIO channel[0] is available.
[INFO]: XIO channel[1] is available.
[INFO]: ---> Total 256 MBytes are now in use.
[INFO]: SPU enable [0, 1, 2, 5, 6, 7] 11101111
[INFO]: BE:11S DD1.0, SB:SX1.2
Cell OS SDK4.8.6 000 (release build: r50715 2020_01_30_110000)
Copyright 2020 Sony Computer Entertainment Inc.
revision: 50702
date: Thu Jan 30 11:25:44 JST 2020
skip 2nd initialization step
lv2(0): total memory size: 249MB+640KB
lv2(0): kern memory size: 12MB+640KB (heap:3492KB page pool:4736KB)
lv2(0): user memory size: 237MB
lv2(2):
lv2(2): Cell OS Lv-2 32 bit version 4.8.6
lv2(2): Copyright 2011 Sony Computer Entertainment Inc.
lv2(2): All Rights Reserved.
lv2(2):
lv2(2): revision: 50715
lv2(2): build date: 2020/01/30 11:30:24
lv2(2): processor: Broadband Engine Ver 0x0000 Rev 0x1000
lv2(2): PPU:0, Thread:0 is enabled.
lv2(2): PPU:0, Thread:1 is enabled.
lv2(2): rsx: rsx65 a06 500/650 vpe:ff shd:6f [AP0011327:1:1:a:b:13:2:5:1][ 3d:0:2:0:1:2:0][2:1:0]

lv2(2): Available physical SPUs: 6/7
lv2(2): mounting the flash file system : ........... Failed (error code:0x800100 2b)
lv2(2):
lv2(2): ###
lv2(2): ### Safe mode
lv2(2): ###
lv2(2):
lv2(2): creating the recover process (for safe mode) : OK

Ok so at this stage you got it right this I'm often calling myself "special glod". If reball or exchange of this rsx not going to change its working status I suggest recap totally 12x470uF caps on both, use vdd for core minimum total wire 3mm diameter.
In case is a board issue and rsx good, it should remain in this stage of glod.
I've pointed those small bridges (=) as those will be used in case you want to pass those together to a side unsoldered port like having all grouped in one port.
Usually for me only exchange rsx was working.
I also think I killed some 40nm while deliding ihs. Well on 65nm delid should be easy but not necessarily reball process won't kill in some way ic from heat.
So I know on all my test all boards should stay in same condition, not worst.
@vyktormvmpay25 in your "special GLOD" (as you call it), Is it normal that it complains about not being able to mount the flash system?

Because that sounds like a NAND/NOR or StarShip2 issue. Maybe he should inspect the pins on the flash to be sure they are connected correctly. Or perhaps they got corrupted?

BTW: @Kostaslgr7 you should be able to attache pics direct to the forum now since you have over 10 posts. Will make life easier for you.
 
Felix test SB log on any working ps3. SB log it is stopping there when no hdd. If there was software installed it could boot further (more data to log), even sound of first boot can come as software is there.Cant remember if it was AV port or Hdmi.
Difference between working unit and special glod is made by "hdmi chstat". On working units will get id numbers, not an empty id of many 00 at end of status.
Do you need any video proof to understand those differences? Anyway reball same ic won't help at this point and not sure how to identify this anyhow by measuments.
I think I did it before but I'll repost myself again.
http://s.go.ro/bk2a9o2x
Also figured PS0/PS1 are related to rsx.
 
Last edited:
@vyktormvmpay25 in your "special GLOD" (as you call it), Is it normal that it complains about not being able to mount the flash system?

Because that sounds like a NAND/NOR or StarShip2 issue. Maybe he should inspect the pins on the flash to be sure they are connected correctly. Or perhaps they got corrupted?

BTW: @Kostaslgr7 you should be able to attache pics direct to the forum now since you have over 10 posts. Will make life easier for you.
Cool, I'll upload directly here, I do have an E3 Nor flasher, not much use for this specific console, also bought teensy 2++ from aliexpress but even though I have soldered 3v3 regulator on it and soldered 3v3 pads together and seperared 5v, light on it doesn't come on(comes if no reg is on and 5v are connected together) also the downgrade tool 1.03 gives me a python msi invalid data error(running windows 11). A bit random, just because you said it may be nand nor issue thought maybe i'd bring it up. Thank you both for all your help so far.
 

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